PCI Graphics Cards Technology

The PCI Interface

PCI, or Peripheral Component Interconnect, is a bus format used to connect modular expansion or device cards - sometimes known as "planar devices" - to a motherboard via a series of slots designed for this purpose.

PCI technology replaced the older bus formats of Industry Standard Architecture (ISA), Micro Channel Architecture (MCA), Extended Industry Standard Architecture (EISA), and VESA Local Bus (VLB).

PCI required much less time and effort when upgrading modular cards by largely eliminating the need to change jumper settings on PCI-enabled motherboards. With the release of PCI, analyzing motherboard schematics to properly adjust internal circuitry became unnecessary, and the now-familiar process of simply popping out an old card, popping in a new one, and installing the appropriate drivers initially began with the introduction of PCI bus architecture.

The PCI bus format supported connections for nearly all types of expansion components available at the time of release, including:

PCI Video Card Interface History

A team of industry innovators at Intel began work on PCI technology in its Architecture Development Lab in or around 1990 under the code name "Saturn." PCI was released on the market in 1993, but the maximum bus speeds offered by PCI technology were well beyond the processing capability of most computers then available.

It wasn't until the release of Intel's Pentium chip in 1994 that widely available personal computers were able to benefit from PCI technology. Over the next two years, PCI demolished competing motherboard architectures and became the universally agreed-upon industry standard for motherboard bus connectivity, although EISA floundered on with a select few users until the year 2000.

Apple incorporated the PCI structure into the Power Macintosh line in 1995 and the Performa line in 1996, replacing its proprietary NuBus architecture entirely.

PCI Technology Revisions

Over time, PCI was upgraded and improved with a series of revisions aimed at increasing the speed and bandwidth of the overall architecture, eventually more than doubling the original output of the design:

After 2002, later revisions of the PCI technology were so extensive that the architecture was renamed to PCI-X and finally, in 2004, to PCI-Express. PCI-Express has undergone several revisions since then, but remains the architecture most commonly used by IBM compatible PCs today.

Even though speeds have dramatically increased, the overall functions of new PCI technologies remain remarkably similar to the original PCI standards, even though they are not reverse compatible.

Technical Operating Parameters

PCI is a synchronous bus architecture, and all data transfers performed in time with the system clock, measured in Megahertz. First generation PCI ran at a 33MHz clock speed, which translates into one complete system bus data transfer per 30 nanoseconds. These speeds were eventually increased in the PCI 2.1 architecture to 66 MHz.

PCI structures use a 32 bit Multiplexed Address and Data bus (MAD), although later revisions were elongated to allow 64 bits. At 33 MHz, a 32 bit connection allows for a maximum data transfer rate of 132 megs per second, while a 64 bit connection allows 264 megs per second.

The MAD provides an overall reduction in the number of pin connections, allowing increased communication speeds for attached PCI components. Normally, a standard 32 bit PCI device card uses around 45-50 pins to maintain connection, and 32 of these pins are incorporated into the MAD.

In a PCI connection, information travels from the signal initiator, or the bus "master" device, to the signal target, or the bus "slave" device. Many PCI connections allow multiple "slave" devices, which all read from the same signal initiator simultaneously. The signal initiator determines the function being formed, generally one of the following:

This function is determined during the "address" phase of the PCI connection.

During the "data" phase of the PCI connection, the memory is relocated or rewritten with the new instructions, and this change is propagated to all appropriate slave devices. There is no limit to the number of data phases that can occur in a single cycle. After all memory block transfers and rewrites are complete, the initiator signals a transfer completion by sending a "stop" signal, and the cycle begins anew.

PCI Graphics Cards Limited Expansion

Although PCI technology is usually associated with graphics cards and PCs, the architecture itself is processor-independent, meaning it can be harnessed for nearly any type of computational system. The one drawback of PCI is that its higher speed limits the overall number of slots that can be made available on the motherboard without lowering the overall speed of the architecture.

This created some issues in the mid- to late 90's as users wrestled with the desire for more expansion cards in a motherboard (in addition to the graphics card slot) that had no available slots. Several workarounds surfaced during the late 90's, including the PCI-to-PCI bridge, but with the release of PCI-Express, many of the functions that had once required expansion cards had been integrated into the motherboard.